Regviz

NXP Semiconductors /LPC800 /I2C /MSTCTL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as MSTCTL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC800/I2C/MSTCTL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NO_EFFECT_)MSTCONTINUE 0 (NO_EFFECT_)MSTSTART 0 (NO_EFFECT_)MSTSTOP 0RESERVED

MSTCONTINUE=NO_EFFECT_, MSTSTART=NO_EFFECT_, MSTSTOP=NO_EFFECT_

Description

Master control register.

Fields

MSTCONTINUE

Master Continue. This bit is write-only.

0 (NO_EFFECT_): No effect.

1 (CONTINUE_INFORMS_TH): Continue. Informs the Master function to continue to the next operation. This must done after writing transmit data, reading received data, or any other housekeeping related to the next bus operation.
MSTSTART

Master Start control. This bit is write-only.

0 (NO_EFFECT_): No effect.

1 (START_A_START_WILL_): Start. A Start will be generated on the I2C bus at the next allowed time.
RESERVED

Reserved. Read value is undefined, only zero should be written.
MSTSTOP

Master Stop control. This bit is write-only.

0 (NO_EFFECT_): No effect.

1 (STOP_A_STOP_WILL_BE): Stop. A Stop will be generated on the I2C bus at the next allowed time, preceded by a Nack to the slave if the master is receiving data from the slave (Master Receiver mode).

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data